"Delay and peak power minimization for on-chip buses using temporal redundancy."

K. Najeeb et al. (2006)

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DOI: 10.1145/1127908.1127938

access: closed

type: Conference or Workshop Paper

metadata version: 2020-09-10

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K. Najeeb, Vishal Gupta, V. Kamakoti, Madhu Mutyam:
Delay and peak power minimization for on-chip buses using temporal redundancy. ACM Great Lakes Symposium on VLSI 2006: 119-122

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