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"Sensitive registers: a technique for reducing the fetch bandwidth in ..."

Andrew Robinson, Jim D. Garside (2007)

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DOI: 10.1145/1228784.1228820

access: closed

type: Conference or Workshop Paper

metadata version: 2022-07-11

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Andrew Robinson, Jim D. Garside:
Sensitive registers: a technique for reducing the fetch bandwidth in low-power microprocessors. ACM Great Lakes Symposium on VLSI 2007: 138-143

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