"Analyzing and modeling process balance for sub-threshold circuit design."

Joseph F. Ryan, Jiajing Wang, Benton H. Calhoun (2007)

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DOI: 10.1145/1228784.1228853

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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Joseph F. Ryan, Jiajing Wang, Benton H. Calhoun:
Analyzing and modeling process balance for sub-threshold circuit design. ACM Great Lakes Symposium on VLSI 2007: 275-280

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