"FLATS: Filling Logic and Testing Spatially for FPGA Authentication and ..."

Adam Duncan et al. (2019)

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DOI: 10.1109/HST.2019.8741025

access: closed

type: Conference or Workshop Paper

metadata version: 2025-08-27

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Adam Duncan, Grant Skipper, Andrew Stern, Adib Nahiyan, Fahim Rahman, Andrew Lukefahr, Mark Tehranipoor, Martin Swany:
FLATS: Filling Logic and Testing Spatially for FPGA Authentication and Tamper Detection. HOST 2019: 81-90

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