"HiPAR-DSP 16, a scalable highly parallel DSP core for system on a chip ..."

Helge Kloos et al. (2002)

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DOI: 10.1109/ICASSP.2002.5745308

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-19

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Helge Kloos, Jens Peter Wittenburg, Willm Hinrichs, Hanno Lieske, Lars Friebe, C. Klar, Peter Pirsch:
HiPAR-DSP 16, a scalable highly parallel DSP core for system on a chip video- and image processing applications. ICASSP 2002: 3112-3115

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