"Design methodology for high-speed iterative decoder architectures."

Mohammad M. Mansour, Naresh R. Shanbhag (2002)

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DOI: 10.1109/ICASSP.2002.5745301

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-19

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Mohammad M. Mansour, Naresh R. Shanbhag:
Design methodology for high-speed iterative decoder architectures. ICASSP 2002: 3085-3088

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