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"Invited Paper: Verilog-to-PyG - A Framework for Graph Learning and ..."
Yingjie Li et al. (2023)
- Yingjie Li, Mingju Liu, Alan Mishchenko, Cunxi Yu:
Invited Paper: Verilog-to-PyG - A Framework for Graph Learning and Augmentation on RTL Designs. ICCAD 2023: 1-4
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