"High-Speed VLSI Arithmetic Processor Architectures Using Hybrid Number ..."

Hosahalli R. Srinivas, Keshab K. Parhi (1991)

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DOI: 10.1109/ICCD.1991.139974

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Hosahalli R. Srinivas, Keshab K. Parhi:
High-Speed VLSI Arithmetic Processor Architectures Using Hybrid Number Representation. ICCD 1991: 564-571

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