"A Compact Model for Analysis and Design of On-chip Power Network with ..."

Payman Zarkesh-Ha et al. (2003)

> Home

Details and statistics

DOI: 10.1109/ICCD.2003.1240877

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

- view
  authority control:
- export record
  dblp key:
  - conf/iccd/Zarkesh-HaDLSSP03
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iccd/Zarkesh-HaDLSSP03
Payman Zarkesh-Ha, Ken Doniger, William Loh, Dechang Sun, Rick Stephani, Gordon Priebe:
A Compact Model for Analysis and Design of On-chip Power Network with Decoupling Capacitors. ICCD 2003: 84-89

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.