"A Novel Design of Area Efficient Full Adder Architecture Using Reversible ..."

Chokkakula Ganesh et al. (2024)

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DOI: 10.1109/ICDCS59278.2024.10560999

access: closed

type: Conference or Workshop Paper

metadata version: 2025-04-01

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Chokkakula Ganesh, Aruru Sai Kumar, P. Santhosh, Anreddy Ramya, Chennoji Shiva Kumar, Ponugoti Thivani:
A Novel Design of Area Efficient Full Adder Architecture Using Reversible Logic Gates. ICDCS 2024: 107-111

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