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"Charge Scavenging Gate Coupled Hierarchical Bitline Scheme for Ultra-Low ..."
Mukesh Kumar Srivastav et al. (2021)
- Mukesh Kumar Srivastav, Rimjhim, Govind Soni, Umang Mittal, Rupali Tewari, Riya Yadav, Anuj Grover, Kedar Janardan Dhori, Harsh Rawat:
Charge Scavenging Gate Coupled Hierarchical Bitline Scheme for Ultra-Low Power SRAMs in 65nm LSTP CMOS. ICECS 2021: 1-6
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