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"A Novel Half-Rate Dual-Response Phase Detector Implementation for a ..."

Bortecene Terlemez, Burak Dundar (2018)

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DOI: 10.1109/ICECS.2018.8618026

access: closed

type: Conference or Workshop Paper

metadata version: 2019-01-24

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  dblp key:
  - conf/icecsys/TerlemezD18
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Bortecene Terlemez, Burak Dundar:
A Novel Half-Rate Dual-Response Phase Detector Implementation for a 25-28.3 Gb/s Clock and Data Recovery Circuit. ICECS 2018: 45-48

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