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"Real-time simulation of modular multilevel converter on FPGA with ..."

Luc-André Grégoire et al. (2014)

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DOI: 10.1109/IECON.2014.7049065

access: closed

type: Conference or Workshop Paper

metadata version: 2018-12-13

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  dblp key:
  - conf/iecon/GregoireFALB14
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  - https://dblp.org/rec/conf/iecon/GregoireFALB14
Luc-André Grégoire, Handy Fortin-Blanchette, Kamal Al-Haddad, Wei Li, Jean Bélanger:
Real-time simulation of modular multilevel converter on FPGA with sub-microsecond time-step. IECON 2014: 3797-3802

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