"A MOS circuit for depressing synapse and its application to ..."

Tetsuya Asai et al. (2004)

> Home

Details and statistics

DOI: 10.1109/IJCNN.2004.1381059

access: closed

type: Conference or Workshop Paper

metadata version: 2025-01-27

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/ijcnn/AsaiKHA04
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/ijcnn/AsaiKHA04
Tetsuya Asai, Yusuke Kanazawa, Tetsuya Hirose, Yoshihito Amemiya:
A MOS circuit for depressing synapse and its application to contrast-invariant pattern classification and synchrony detection. IJCNN 2004: 2619-2624

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.