"Compact VLSI Neural Network Circuit with High-Capacity Dynamic Synapses."

Alex Yoondong Park et al. (2000)

> Home

Details and statistics

DOI: 10.1109/IJCNN.2000.860775

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

- view
  authority control:
- export record
  dblp key:
  - conf/ijcnn/ParkLBS00
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/ijcnn/ParkLBS00
Alex Yoondong Park, Jim-Shih Liaw, Theodore W. Berger, Bing J. Sheu:
Compact VLSI Neural Network Circuit with High-Capacity Dynamic Synapses. IJCNN (4) 2000: 214-218

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.