"A Simulation Study of Scaling Capability toward 10nm for the 3D Stackable ..."

Wei-Chen Chen et al. (2023)

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DOI: 10.1109/IMW56887.2023.10145823

access: closed

type: Conference or Workshop Paper

metadata version: 2023-06-16

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Wei-Chen Chen, Hang-Ting Lue, Tzu-Hsuan Hsu, Keh-Chung Wang, Chih-Yuan Lu:
A Simulation Study of Scaling Capability toward 10nm for the 3D Stackable Gate-Controlled Thyristor (GCT) DRAM Device. IMW 2023: 1-4

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