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"A Parallel Algorithm for Bayesian Network Inference Using Arithmetic Circuits."

Md. Vasimuddin, Sriram P. Chockalingam, Srinivas Aluru (2018)

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DOI: 10.1109/IPDPS.2018.00014

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/ipps/VasimuddinCA18
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  persistent URL:
  - https://dblp.org/rec/conf/ipps/VasimuddinCA18
Md. Vasimuddin, Sriram P. Chockalingam, Srinivas Aluru:
A Parallel Algorithm for Bayesian Network Inference Using Arithmetic Circuits. IPDPS 2018: 34-43

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