"Hardware Efficient Accelerator for Spiking Transformer With Reconfigurable ..."

Bo-Yu Chen, Tian-Sheuan Chang (2025)

> Home

Details and statistics

DOI: 10.1109/ISCAS56072.2025.11043330

access: closed

type: Conference or Workshop Paper

metadata version: 2025-07-08

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/iscas/ChenC25b
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iscas/ChenC25b
Bo-Yu Chen, Tian-Sheuan Chang:
Hardware Efficient Accelerator for Spiking Transformer With Reconfigurable Parallel Time Step Computing. ISCAS 2025: 1-5

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.