"VLSI architecture of low memory and high speed 2D lifting-based discrete ..."

Jen-Shiun Chiang et al. (2005)

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DOI: 10.1109/ISCAS.2005.1465645

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-21

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Jen-Shiun Chiang, Chih-Hsien Hsia, Hsin-Jung Chen, Te-Jung Lo:
VLSI architecture of low memory and high speed 2D lifting-based discrete wavelet transform for JPEG2000 applications. ISCAS (5) 2005: 4554-4557

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