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"A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed ..."

Ettore Napoli et al. (2020)

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DOI: 10.1109/ISCAS45731.2020.9180700

access: closed

type: Conference or Workshop Paper

metadata version: 2021-01-18

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Ettore Napoli, Davide De Caro, Nicola Petra, Antonio G. M. Strollo:
A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate. ISCAS 2020: 1

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