"Validation analysis and test flow optimization of VLSI chip."

Yanzhuo Tan et al. (2005)

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DOI: 10.1109/ISCAS.2005.1465923

access: closed

type: Conference or Workshop Paper

metadata version: 2023-05-23

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Yanzhuo Tan, Yinhe Han, Xiaowei Li, Feiyin Lu, Yuchuan Chen:
Validation analysis and test flow optimization of VLSI chip. ISCAS (6) 2005: 5666-5669

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