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"A Low-Power 12-bit 2GS/s Time-Interleaved Pipelined-SAR ADC in 28nm CMOS ..."

Xiao Wang et al. (2018)

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DOI: 10.1109/ISCAS.2018.8351064

access: closed

type: Conference or Workshop Paper

metadata version: 2020-08-27

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Xiao Wang, Chengwei Wang, Fule Li, Zhihua Wang:
A Low-Power 12-bit 2GS/s Time-Interleaved Pipelined-SAR ADC in 28nm CMOS Process. ISCAS 2018: 1-5

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