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"Design of low-power and high-performance 10 nm SRAM using ..."

Niraj Kumar Singh et al. (2023)

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DOI: 10.1109/ISDCS58735.2023.10153525

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-07

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Niraj Kumar Singh, Ravi Shankar, Suraj Verma, Manodipan Sahoo:
Design of low-power and high-performance 10 nm SRAM using Electrostatically doped TMD TFET. ISDCS 2023: 1-6

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