"Write-energy-saving ReRAM-based nonvolatile SRAM with redundant ..."

Tsai-Kan Chien et al. (2017)

> Home

Details and statistics

DOI: 10.1109/ISLPED.2017.8009153

access: closed

type: Conference or Workshop Paper

metadata version: 2017-08-17

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/islped/ChienCTSWTW17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/islped/ChienCTSWTW17
Tsai-Kan Chien, Lih-Yih Chiou, Yi-Sung Tsou, Shyh-Shyuan Sheu, Pei-Hua Wang, Ming-Jinn Tsai, Chih-I Wu:
Write-energy-saving ReRAM-based nonvolatile SRAM with redundant bit-write-aware controller for last-level caches. ISLPED 2017: 1-6

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.