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"1.2V 1.6Gb/s 56nm 6F2 4Gb DDR3 SDRAM with hybrid-I/O sense ..."

Yongsam Moon et al. (2009)

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DOI: 10.1109/ISSCC.2009.4977341

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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  - conf/isscc/MoonCLJHKJSSCSCKJK09
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  - https://dblp.org/rec/conf/isscc/MoonCLJHKJSSCSCKJK09
Yongsam Moon, Yong-Ho Cho, Hyun-Bae Lee, Byung-Hoon Jeong, Seok-Hun Hyun, Byungchul Kim, In-Chul Jeong, Seong-Young Seo, Junho Shin, Seok-Woo Choi, Ho-Sung Song, Jung-Hwan Choi, Kyehyun Kyung, Young-Hyun Jun, Kinam Kim:
1.2V 1.6Gb/s 56nm 6F² 4Gb DDR3 SDRAM with hybrid-I/O sense amplifier and segmented sub-array architecture. ISSCC 2009: 128-129

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