"A low-noise fast-settling PLL frequency synthesizer for CDMA receivers."

Shaojun Wu (2004)

> Home

Details and statistics

DOI: 10.1109/ISSOC.2004.1411146

access: closed

type: Conference or Workshop Paper

metadata version: 2020-04-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/issoc/Wu04
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/issoc/Wu04
Shaojun Wu:
A low-noise fast-settling PLL frequency synthesizer for CDMA receivers. SoC 2004: 57-60

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.