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"A Cost-Effective CNN Accelerator Design with Configurable PU on FPGA."

Chi Fung Brian Fong, Jiandong Mu, Wei Zhang (2019)

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DOI: 10.1109/ISVLSI.2019.00015

access: closed

type: Conference or Workshop Paper

metadata version: 2019-09-24

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  dblp key:
  - conf/isvlsi/FongM019
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  - https://dblp.org/rec/conf/isvlsi/FongM019
Chi Fung Brian Fong, Jiandong Mu, Wei Zhang:
A Cost-Effective CNN Accelerator Design with Configurable PU on FPGA. ISVLSI 2019: 31-36

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