BibTeX record conf/isvlsi/KhalapureSNV17

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@inproceedings{DBLP:conf/isvlsi/KhalapureSNV17,
  author    = {Sumit Khalapure and
               Siddharth R. K. and
               Kumar Y. B. Nithin and
               M. H. Vasantha},
  title     = {Design of 5-Bit Flash {ADC} Using Multiple Input Standard Cell Gates
               for Large Input Swing},
  booktitle = {2017 {IEEE} Computer Society Annual Symposium on VLSI, {ISVLSI} 2017,
               Bochum, Germany, July 3-5, 2017},
  pages     = {585--588},
  publisher = {{IEEE} Computer Society},
  year      = {2017},
  url       = {https://doi.org/10.1109/ISVLSI.2017.108},
  doi       = {10.1109/ISVLSI.2017.108},
  timestamp = {Mon, 11 May 2020 17:47:40 +0200},
  biburl    = {https://dblp.org/rec/conf/isvlsi/KhalapureSNV17.bib},
  bibsource = {dblp computer science bibliography, https://dblp.org}
}
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