Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"A Method for Integrating Network-on-Chip Topologies with 3D ICs."

M. Pawan Kumar et al. (2011)

> Home

Details and statistics

DOI: 10.1109/ISVLSI.2011.74

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

- view
  authority control:
- export record
  dblp key:
  - conf/isvlsi/KumarKMBV11
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isvlsi/KumarKMBV11
M. Pawan Kumar, Anish S. Kumar, Srinivasan Murali, Luca Benini, Kamakoti Veezhinathan:
A Method for Integrating Network-on-Chip Topologies with 3D ICs. ISVLSI 2011: 60-65

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.