"Optimizing Test Wrapper for Embedded Cores Using TSV Based 3D SOCs."

Surajit Kumar Roy et al. (2011)

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DOI: 10.1109/ISVLSI.2011.33

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  - https://dblp.org/rec/conf/isvlsi/RoyGGR11
Surajit Kumar Roy, Chandan Giri, Sourav Ghosh, Hafizur Rahaman:
Optimizing Test Wrapper for Embedded Cores Using TSV Based 3D SOCs. ISVLSI 2011: 31-36

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