"BatchSim: Parallel RTL Simulation Using Inter-Cycle Batching and Task ..."

Jie Tong et al. (2024)

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DOI: 10.1109/ISVLSI61997.2024.00155

access: closed

type: Conference or Workshop Paper

metadata version: 2024-10-01

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Jie Tong, Liangliang Chang, Umit Yusuf Ogras, Tsung-Wei Huang:
BatchSim: Parallel RTL Simulation Using Inter-Cycle Batching and Task Graph Parallelism. ISVLSI 2024: 789-793

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