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"Design and Implementation of Full Adder Circuit Based on VTM-Logic Gates."

Farzad Mozafari, Majid Ahmadi, Arash Ahmadi (2023)

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DOI: 10.1109/MWSCAS57524.2023.10405980

access: closed

type: Conference or Workshop Paper

metadata version: 2024-02-24

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  - conf/mwscas/MozafariAA23
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  - https://dblp.org/rec/conf/mwscas/MozafariAA23
Farzad Mozafari, Majid Ahmadi, Arash Ahmadi:
Design and Implementation of Full Adder Circuit Based on VTM-Logic Gates. MWSCAS 2023: 389-393

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