"Formal modeling and verification for pre-charge half buffer gates and ..."

Ashiq A. Sakib, Scott C. Smith, Sudarshan K. Srinivasan (2017)

> Home

Details and statistics

DOI: 10.1109/MWSCAS.2017.8052974

access: closed

type: Conference or Workshop Paper

metadata version: 2020-09-05

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/mwscas/SakibSS17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/mwscas/SakibSS17
Ashiq A. Sakib, Scott C. Smith, Sudarshan K. Srinivasan:
Formal modeling and verification for pre-charge half buffer gates and circuits. MWSCAS 2017: 519-522

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.