"3D on-chip networking technology based on post-silicon devices for future ..."

Shinobu Fujita et al. (2006)

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DOI: 10.1109/NANONET.2006.346233

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Shinobu Fujita, Kumiko Nomura, Keiko Abe, Thomas H. Lee:
3D on-chip networking technology based on post-silicon devices for future networks-on-chip. Nano-Net 2006: 1-5

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