"Efficient Design of Bit-level Accelerator Architectures for the DEDR-RASF ..."

Alejandro Castillo Atoche et al. (2012)

> Home

Details and statistics

DOI: —

access: unavailable

type: Conference or Workshop Paper

metadata version: 2021-03-25

- no documents available
- export record
  dblp key:
  - conf/peccs/AtocheLCD12
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/peccs/AtocheLCD12
Alejandro Castillo Atoche, Johan J. Estrada-López, Renan Quijano Cetina, Luis Rizo Domínguez:
Efficient Design of Bit-level Accelerator Architectures for the DEDR-RASF Remote Sensing Algorithm using Super-systolic Arrays. PECCS 2012: 327-333

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.