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"Brief announcement: how to speed-up fault-tolerant clock generation in ..."

Andreas Dielacher, Matthias Függer, Ulrich Schmid (2009)

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DOI: 10.1145/1582716.1582762

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  - conf/podc/DielacherFS09
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Andreas Dielacher, Matthias Függer, Ulrich Schmid:
Brief announcement: how to speed-up fault-tolerant clock generation in VLSI systems-on-chip via pipelining. PODC 2009: 276-277

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