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"Low-Power High-Throughput BCH Error Correction VLSI Design for Multi-Level ..."

Wei Liu, Junrye Rho, Wonyong Sung (2006)

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DOI: 10.1109/SIPS.2006.352599

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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Wei Liu, Junrye Rho, Wonyong Sung:
Low-Power High-Throughput BCH Error Correction VLSI Design for Multi-Level Cell NAND Flash Memories. SiPS 2006: 303-308

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