"A High Performance, Low Energy, Compact Masked 128-Bit AES in 22nm CMOS ..."

Yuan-Hsi Chou, Shih-Lien Lu (2019)

> Home

Details and statistics

DOI: 10.1109/VLSI-DAT.2019.8741835

access: closed

type: Conference or Workshop Paper

metadata version: 2019-07-01

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vlsi-dat/ChouL19
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsi-dat/ChouL19
Yuan-Hsi Chou, Shih-Lien Lu:
A High Performance, Low Energy, Compact Masked 128-Bit AES in 22nm CMOS Technology. VLSI-DAT 2019: 1-4

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.