"A 11-bit 35-MS/s wide input range SAR ADC in 180-nm CMOS process."

Wen-Chia Luo et al. (2018)

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DOI: 10.1109/VLSI-DAT.2018.8373252

access: closed

type: Conference or Workshop Paper

metadata version: 2018-06-13

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Wen-Chia Luo, Soon-Jyh Chang, Chun-Po Huang, Hao-Sheng Wu:
A 11-bit 35-MS/s wide input range SAR ADC in 180-nm CMOS process. VLSI-DAT 2018: 1-4

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