"A time interleaved DAC sharing SAR Pipeline ADC for ultra-low power camera ..."

Anvesha Amaravati, Manan Chugh, Arijit Raychowdhury (2015)

> Home

Details and statistics

DOI: 10.1109/VLSI-SOC.2015.7314421

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vlsi/AmaravatiCR15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsi/AmaravatiCR15
Anvesha Amaravati, Manan Chugh, Arijit Raychowdhury:
A time interleaved DAC sharing SAR Pipeline ADC for ultra-low power camera front ends. VLSI-SoC 2015: 231-236

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.