"Asynchronous Integration of Coarse-Grained Reconfigurable XPP-Arrays Into ..."

Jürgen Becker, Alexander Thomas, Maik Scheer (2003)

> Home

Details and statistics

DOI: 10.1007/0-387-33403-3_17

access: open

type: Conference or Workshop Paper

metadata version: 2019-07-19

- view
  - electronic edition via DOI (open access)
  authority control:
- export record
  dblp key:
  - conf/vlsi/BeckerTS03a
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsi/BeckerTS03a
Jürgen Becker, Alexander Thomas, Maik Scheer:
Asynchronous Integration of Coarse-Grained Reconfigurable XPP-Arrays Into Pipelined Risc Processor Datapath. VLSI-SoC (Selected Papers) 2003: 263-279

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.