"Memory Sizing of a Scalable SRAM In-Memory Computing Tile Based Architecture."

Roman Gauchi et al. (2019)

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DOI: 10.1109/VLSI-SOC.2019.8920373

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-07

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Roman Gauchi, Maha Kooli, Pascal Vivet, Jean-Philippe Noël, Edith Beigné, Subhasish Mitra, Henri-Pierre Charles:
Memory Sizing of a Scalable SRAM In-Memory Computing Tile Based Architecture. VLSI-SoC 2019: 166-171

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