


default search action
"Minimizing wire delays by net-topology aware binding during floorplan- ..."
Vyas Krishnan, Srinivas Katkoori (2007)
- Vyas Krishnan, Srinivas Katkoori

:
Minimizing wire delays by net-topology aware binding during floorplan- driven high level synthesis. VLSI-SoC 2007: 99-104

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.


Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID













