Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"Design of a 1.2-V 130nm CMOS 13-bit@40MS/s Cascade 2-2-1 Continuous-Time ..."

Ramon Tortosa Navas et al. (2006)

> Home

Details and statistics

DOI: 10.1109/VLSISOC.2006.313245

access: closed

type: Conference or Workshop Paper

metadata version: 2022-03-02

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/vlsi/NavasARFR06
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/vlsi/NavasARFR06
Ramon Tortosa Navas, Antonio Aceituno, José M. de la Rosa, Francisco V. Fernández, Ángel Rodríguez-Vázquez:
Design of a 1.2-V 130nm CMOS 13-bit@40MS/s Cascade 2-2-1 Continuous-Time Sigma-Delta Modulator. VLSI-SoC 2006: 267-271

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.