"High Speed Area Efficient Multi-resolution 2-D 9/7 filter DWT Processor."

Senthamaraikannan Raghunath, Syed Mahfuzul Aziz (2006)

Details and statistics

DOI: 10.1109/VLSISOC.2006.313235

access: closed

type: Conference or Workshop Paper

metadata version: 2017-08-28

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.