"A 0.9pJ/Cycle 8ppm/°C DFLL-Based Wakeup Timer Enabled by a ..."

Ming Ding et al. (2020)

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DOI: 10.1109/VLSICIRCUITS18222.2020.9162787

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-02

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Ming Ding, Minyoung Song, Evgenii Tiurin, Stefano Traferro, Yao-Hong Liu, Christian Bachmann:
A 0.9pJ/Cycle 8ppm/°C DFLL-Based Wakeup Timer Enabled by a Time-Domain Trimming and An Embedded Temperature Sensing. VLSI Circuits 2020: 1-2

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