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"1Mb 4T-2MTJ nonvolatile STT-RAM for embedded memories using 32b ..."

Takashi Ohsawa et al. (2012)

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DOI: 10.1109/VLSIC.2012.6243782

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-02

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  - conf/vlsic/OhsawaKMHTIHOE12
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Takashi Ohsawa, Hiroki Koike, Sadahiko Miura, Hiroaki Honjo, Keiichi Tokutome, Shoji Ikeda, Takahiro Hanyu, Hideo Ohno, Tetsuo Endoh:
1Mb 4T-2MTJ nonvolatile STT-RAM for embedded memories using 32b fine-grained power gating technique with 1.0ns/200ps wake-up/power-off times. VLSIC 2012: 46-47

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