"Low-Energy BIST Design for Scan-based Logic Circuits."

Bhargab B. Bhattacharya, Sharad C. Seth, Sheng Zhang (2003)

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DOI: 10.1109/ICVD.2003.1183191

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Bhargab B. Bhattacharya, Sharad C. Seth, Sheng Zhang:
Low-Energy BIST Design for Scan-based Logic Circuits. VLSI Design 2003: 546-551

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