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ORCID"Deriving Signal Constraints to Accelerate Sequential Test Generation."
Srimat T. Chakradhar, Vijay Gangaram, Steven G. Rothweiler (1997)
- Srimat T. Chakradhar, Vijay Gangaram, Steven G. Rothweiler:
Deriving Signal Constraints to Accelerate Sequential Test Generation. VLSI Design 1997: 488-494
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