"A Low-Power, Low-Noise, High-Performance Re-Convergent Clock Mesh Design ..."

Harivinay Kancharla, Sounil Biswas (2025)

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DOI: 10.1109/VLSID64188.2025.00078

access: closed

type: Conference or Workshop Paper

metadata version: 2025-03-17

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Harivinay Kancharla, Sounil Biswas:
A Low-Power, Low-Noise, High-Performance Re-Convergent Clock Mesh Design for Large AI Compute Clusters. VLSID 2025: 380-385

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